At our most recent webcast, “Everything You Wanted to Know About Storage But Were Too Proud To Ask: Part Turquoise – Where Does My Data Go?, our panel of experts dove into what really happens when you hit “save” and send your data off. It was an alphabet soup of acronyms as they explained the nuances of and the differences between:
- Volatile v Non-Volatile v Persistent Memory
- NVDIMM v RAM v DRAM v SLC v MLC v TLC v NAND v 3D NAND v Flash v SSDs v NVMe
- NVMe (the protocol)
As promised during the live event, here are answers to all the questions we received.
Q. Is SRAM still used today?
A. SRAM is still in use today as embedded CACHE (Level 1/2/3) within a CPU and very limited in external standalone packaging… This is due to cost and size/capacity.
Q. Does 3D NAND use multiple voltage levels? Or does each layer use just two voltages?
A. 3D NAND is much like Planar NAND in operation. Supporting all the versions (SLC, MLC, TLC, and future even QLC). Other challenges exist going vertical, but are unrelated to voltage levels being supported
Q. How does Symbolic IO work with the NVDIMM-P?
A. SNIA does not comment on individual companies. Please contact Symbolic IO directly.
Q. When do you see NVMe over Fibre Channel becoming mainstream? Just a “guesstimate”
A. At the time of this writing, FC-NVMe (the standardized form of NVMe over Fabrics using Fibre Channel) is in the final ratification phase and is technically stable. By the time you read this it will likely already be completed. The standard itself is already a mainstream form of NVMe-oF, and has been a part of the NVMe-oF standard since the beginning. Market usage for NVMe-oF will ramp up as vendors, products, and ecosystem developments continue to announce innovations. Different transport mechanisms solve different problems, and the uses for Fibre Channel are not 100% overlapped with Ethernet or Fibre Channel. Having said that, it would not be surprising that both FC and Ethernet-based NVMe-oF grew at a somewhat similar pace for the next couple of years.
Q. How are networked NVMe SSDs addressed?
A. Each NVMe-oF transport layer has an addressing scheme that is used for discovery. NVMe SSDs actually connect to the Fabric transport through a port connected with the NVMe controller. A thorough description of how this works can be found at the SNIA ESF webcast: “Under the Hood with NVMe over Fabrics.” You can also check out the Q&A blog from that webcast.
Q. NVMe has any specific connectors like SATA or SAS would do?
A. When looking at the physical drive connector, the industry came up with an edge connector called “U.2” that supports NVMe, SAS and SATA drives. However, the backplane in the host system must be connected correctly
Q. Other than a real-estate savings, what advantage does the 3D NAND offer? Speed?
A. 3D NAND brings to us the added space used for the floating gate. When we get down to 20nm and 16nm (the measured width of the that floating gate) it only allows a few electrons, yes actual electrons, to separate the states. With 3D NAND we have room grow the gate, allowing more electrons per level and gaining us the ability to have things like TLC and beyond a reality.
Don’t forget, you can check out the recorded version of the webcast at your convenience and you can download the webcasts slides as well if you’d like to follow along. Remember, this webcast was part of series. I encourage you to register today for our next one, which will be on September 28, 2017 at 10:00 am PT – Part Cyan – Storage Management. And please visit the SNIA ESF website for our full library of ESF webcasts.
Can you go into more detail on the physical drive connection architecture and how NVME connected with U2 works?
Hi David,
NVMe itself is a protocol that doesn’t depend on the physical interconnect between the storage device and the PCIe connection (form factor). That is, regardless of whether we’re talking M.2, U.2, or any other physical interconnect, NVMe does not change. Hope that helps.